This application claims priority from R.O.C. patent application Ser. No. 092103955, filed Feb. 26, 2003, the entire disclosure of which is incorporated herein by reference.
The present invention relates to a trench filling process for preventing formation of voids, and more particularly to a process for filling a trench structure of a trench-type MOS device so as to prevent formation of voids in the trench structure.
Nowadays, trench-type MOS devices are widely used in the semiconductor industry. A process for producing a trench-type PMOS device is illustrated with reference to FIGS. 1(a) to 1(d).
In FIG. 1(a), a pad oxide layer 11, a silicon nitride layer 12 and an oxide layer 13 are sequentially formed on a semiconductor substrate 10. The pad oxide layer 11 functions as a buffer layer so as to reduce stress between the semiconductor substrate 10 and the silicon nitride layer 12. The silicon nitride layer 12 is deposited on the pad oxide layer 11 at a temperature of about 400xc2x0 C. to 800xc2x0 C. by using reactive gases comprising SiH4, N2O and NH3. The oxide layer 13 is formed on the silicon nitride layer 12 by using a chemical vapor deposition (CVD) procedure.
Then, the oxide layer 13, the silicon nitride layer 12, the pad oxide layer 11 and the semiconductor substrate 10 are partially etched to form a trench structure 14 by a micro-photolithography and dry-etching procedure, as can be seen in FIG. 1(b). Preferably, the dry-etching procedure is performed by a plasma-etching system.
As is known in the art, after the plasma-etching procedure is performed, some particles might be produced on the bottom and/or sidewalls of the trench structure 14 and thus uneven surfaces are formed thereon. In order to overcome such a problem, a sacrificial oxide layer (not shown) is formed on the sidewall of the trench structure 14, and then approximately 500 xc3x85 of the sacrificial oxide layer is removed so as to form a resulting structure of FIG. 1(c).
A trench-fill layer 15 such as a polysilicon layer is then formed to fill the trench structure 14 and deposited over the oxide layer 13, and a drive-in procedure is performed at a temperature of 800xcx9c1000xc2x0 C., thereby forming a resulting trench structure of FIG. 1(d).
After the step of removing the sacrificial oxide layer, it is often unavoidable to remove partial side surfaces of the pad oxide layer 11 and sidewalls of the semiconductor 10 to approximately 200 xc3x85. The silicon nitride layer 12 will protrude from the sidewalls of the trench structure 14 so as to form a salient 120 (as shown in FIG. 1(c). Referring again to FIG. 1(d), after the polysilicon layer 15 is filled in the trench structure 14 and the drive-in procedure is performed, some undesirable voids 151 will typically be formed in the vicinity under the salient 120 or even in other parts of the trench structure 14. When the finished semiconductor device is operated, current leakage usually occurs due to the formation of voids and undercutting from dry-etching procedure.
Therefore, there is a need for a process for preventing formation of voids in the trench structure upon filling a trench-fill layer such as a polysilicon layer so as to overcome the above-mentioned problems.
Embodiments of the present invention relate to a process for filling a trench structure of a semiconductor device to prevent formation of voids in the trench structure so as to minimize current leakage and provide excellent electrical properties.
In accordance with an aspect of the present invention, a process for filling a trench of a semiconductor device comprises providing a semiconductor substrate; forming a silicon nitride layer on the semiconductor substrate; forming an oxide layer on the silicon nitride layer; partially removing the oxide layer, the silicon nitride layer and the semiconductor substrate to form at least one trench; forming a sacrificial oxide layer on sidewalls of the trench; removing the sacrificial oxide layer; performing an etching procedure to remove portions of the silicon nitride layer protruding from the sidewalls of the trench so as to form substantially even sidewalls of the trench; and forming a trench-fill layer to fill the trench and deposit on the oxide layer.
In some embodiments, the etching procedure is a wet-etching procedure. The wet-etching procedure is performed for about 100 to 200 seconds. The wet-etching procedure is performed by an etchant with a selectivity of silicon nitride layer to oxide layer of at least about 10. The etchant desirably has a selectivity of silicon nitride layer to oxide layer ranging from about 50 to 100. The etchant comprises a phosphoric acid solution. The wet-etching procedure is performed at a temperature of about 130xc2x0 C. to 180xc2x0 C. A pad oxide layer is formed between the semiconductor substrate and the silicon nitride layer before forming the silicon nitride layer. An ion drive-in procedure is performed after forming the trench-fill layer to fill the trench and deposit on the oxide layer. The ion drive-in procedure is performed at a temperature of about 800xc2x0 C. to 1,000xc2x0 C.
In accordance with another aspect of the present invention, a process for producing a trench-type semiconductor device comprises providing a semiconductor device including an oxide layer disposed on a silicon nitride layer which is disposed on a semiconductor substrate, and a trench extending through the oxide layer and the silicon nitride layer and partially through the semiconductor substrate, the silicon nitride layer protruding from sidewalls of the trench. The method further comprises an etching procedure having a higher selectivity for the silicon nitride layer than for the oxide layer sufficient to remove portions of the silicon nitride layer protruding from the sidewalls of the trench to form substantially even sidewalls of the trench. A trench-fill layer is formed to fill the trench and deposit on the oxide layer. The trench-type semiconductor device may comprise a PMOS.